Following series of posts capture experiements done with the keyence logic builder to make programs for the Programmable Logic Controller devices. These are pretty basic experiments and anyone can follow it along. These were the experiments and records i did as a student. Posting it here as a blog content.
Keyence Ladder Builder:
KV Ladder Builder can simulate program execution even without a PLC connected. Debugging efficiency is enhanced by providing a single step execution (forward and reverse) in addition to a regular scan execution function.
Working with the tool:
Open the software here:
Start -> Programs
-> Keyence Applications ->
Ladder Builder for KV
Create a new file. Select the KV10 model.
Figure 1 - 1 Keyence Ladder Builder First View |
Basic Table of I/O
Input Relays |
0000 – 0005 |
Output Relays |
0500 – 0503 |
Internal Relays |
1000 – 1915 |
Timers/ Counters |
T/C 000 – 063 |
Data Memory |
DM 0 -0999 |
Ladder Editor:
Drawing the ladder logic program in ladder
editor.
Relay type |
Key |
Normally open Input |
F5 |
Normally closed Input |
Shift + F5 |
Normally open Output |
F7 |
Normally closed Output |
Shift + F7 |
Horizontal line |
F9 |
Vertical line |
F8 |
Figure 1 - 2 Adding Bit Logic NO and NC |
After drawing the ladder logic, click the bottom of the last rung.
Type END -> for end of routine . Click OK.
Below this line, Type ENDH -> for end of program. Click OK.
Click the simulator button to simulate the program.
In the simulator window execute the program for continuous scan.
Figure 1 - 3 Simulating Ladder Diagram |
There are two ways to switch on an input relay.
1. Double click with mouse button.
2. Modify the value in the bottom of the screen.
Figure 1 - 4 Changing Status of Input |
Realization of Gates
Problem
Statement: To Realize Logic Gates AND, OR, NOT, XOR, NAND, NOR, XNOR
gates using Ladder logic programming.
Input Output Allocation:
<Relay>
<No.> <Label>
<Comment1> <Comment2> <Comment3>
0000 :INPUT1 Input Relay
0001 :INPUT2 Input Relay
0500 :ANDOUTPU And Output
0501 :OROUTPUT OR Output
0502 :NOTOUTPU NOT Output
0503 :NOROUTPU NOR Output
0504 :NANDOUTP NAND Output
0505 :XNOROUTP XNOR Output
0506 :XOROUTPU XOR Output
Ladder Logic Program:
Figure 1 - 5 Complete Ladder Logic Program |
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