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Saturday, February 25, 2012

The Instruction Pointer in 8086

The code segment register holds the upper 16 bits of the starting address of the segment from which the BIU is currently fetching the instruction code byte.

Now the instruction pointer comes in picture. This register is responsible for holding the 16 bit offset, of the next code byte within this code segment.
The value contained in the IP is referred to as the offset because this value must be “offset” from(added to)the segment base address in code segment to produce the required 20 bit physical address sent out by the BIU. Get it?? No. Then let’s repeat again.

Address given to processor(16 bit) – but processor smart – see it adds lower 4bits to the 16 bit to attain 20 bit physical address – to comprehend its smartness they created an oversmart personalty called IP – this oversmart guy stores the 16 bit number that when added to last known instruction address gives us a new instruction address – as BIU is IP’s boss so he goes away with the credit leaving a super smart IP high and dry.

See example.
Say an instruction 16  bit address is 3432H.
The smart processor guess that instruction is at address 34320H. Voila he is right. But he doesn’t know where is the next address.
Here enters our hero IP. He is so smart that he knows next instruction is at 45431H. so what he does is stores 1111H in his memory.
So when asked by BIU (his boss) where is the next instruction. He gives him the value that needed to be added to get 45431H. yes he gives 1111H.

So..
34320H + 1111H = 45431H.
BIU fetches instruction and provide it to the processor for execution.

See this is how 8086 fetches instruction.

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