Interrupt Name | Maskable | Masking Method | Vectored | Memory | Triggering Method |
INTR | Yes | DI / EI | No | No | Level Sensitive |
RST 5.5 / RST 6.5 | Yes | DI / EI SIM | Yes | No | Level Sensitive |
RST 7.5 | Yes | DI / EI SIM | Yes | Yes | Edge Sensitive |
TRAP | No | None | Yes | No | Level & Edge Sensitive |
The blog talks about variety of topics on Embedded System, 8085 microprocessor, 8051 microcontroller, ARM Architecture, C2000 Architecture, C28x, AVR and many many more. Also includes some projects that have been worked upon and also episodes to Embedded System Podcast.
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Friday, August 5, 2011
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