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Tuesday, June 14, 2011

Absolute decoding VS Partial Decoding


ABSOLUTE DECODING


The decoding in which all available address line (16 lines in memory mapped and 8 lines in
peripheral mapping) are used for decoding to generate a unquie address is called absolute
decoding see fig.


ABSOLUTE DECODING




PARTIAL DECODING


The decoding in which all available address line(16 lines in memory mapping and 8 lines in
peripheral mapping) are not used for decoding resulting in multiple address for same port is
called partial decoding. see fig.


PARTIAL DECODING


6 comments:

  1. sir,
    why we don't use 16 address lines in latch enable in absolute decoding. you used only A0- A7 ?

    ReplyDelete
  2. Bhupendra,
    Sorry for the late reply.

    Above figure is for decoding the peripherals I/O devices not the memory devices.

    The peripheral devices can only be accessed using A0-A7 cause those are the lines that are multiplexed with data lines D0 - D7.

    Remember 8085 can access 2^8 I/O devices.

    ReplyDelete
  3. dude , the advantage of partial decoding is cost saving probably by reducing the decoder logic. i want to ask how?

    ReplyDelete
    Replies
    1. well in the absolute decoding we use all the address and data lines to get an absolute address.
      So to connect all data lines we need a larger bus area, bigger decoder IC, and more logical IC's(used for gates)

      While in partial decoding we can use half of the data and address lines to get a relative address of the periphery.
      So lesser the data line less area for bus is required, small decoder ICs will do the job and less Logical ICs are required....


      The major area covered in any board is of buses if we can reduce that we can reduce the size of the board....
      And remember these same buses we use for decoding goes to every periphery on the board. so you can now imagine how much cost a partial decoding can cut...

      Delete
    2. Cost cutting was neccessary in era of 90's and 80's when concept of chip design was pretty new. Everything decoder to logical gates were on different chips. and pcbs were of only 2 layer were possible. Now a days in processors quad layer pcb techniques are used so attain reliable and absolute hardware and addresses.

      Delete
  4. This is very Helpful.
    Please Define "Wrap Around" also ?

    ReplyDelete